1. Field of the Invention
This invention relates to a semiconductor device to be used in a facsimile, a camera, a scanner device for image reading, etc., particularly to a semiconductor device which determines the next accumulation time based on the signals of the signal charges accumulated at a predetermined accumulation time read from a plural number of charge accumulation type sensor elements.
2. Related Background Art
In the prior art, a sensor device of the charge accumulation type has a constitution as shown below.
FIG. 1 is a schematic diagram showing the constitution of the charge accumulation type sensor device.
As shown in the same Figure, a plural number (n) of sensor cells S.sub.1 -S.sub.n are respectively connected to electrical switching circuits SW.sub.1 -SW.sub.2 for reading the signals by said sensor cells. The respective switching circuits SW.sub.1 -SW.sub.n are electrically connected to a shift register SR and are successively scanned by said shift register SR. The signals accumulated in the respective sensor cells are successively then processed by an amplifier AM to be outputted from output terminal OUT. The output from the amplifier AM is subjected to peak detection and average value arithmetic operation in the arithmetic operation circuit C for determining the accumulation time in the sensor cell for the next time and the output signal of circuit C is feedback to the shift register SR. The accumulation time greatly influences the sensitivity and the S/N ratio, thus the accumulation time can be determined on the basis of the signal read from the sensor cell.
FIG. 2 is a schematic diagram for illustration of the signal read cycle of the photosensor of the above charge accumulation type.
As shown in the same Figure, the signal read cycle for one time requires, in addition to the accumulation time (t.sub.n) and the read time (t.sub.r), the arithmetic operation time (t.sub.c) for calculating the accumulation time for the next time (t.sub.n+1), and further requires a one cycle idle time which is not finally outputted for calculating the accumulation time of the first time (t.sub.n-1 +t.sub.r +t.sub.c).
However, the arithmetic operation time (t.sub.c) and the idle time as mentioned above are difficult for high speed actuation, additionally the arithmetic operation circuit is complicated. Therefore it is desired to have the signal processing device lower in cost having high reliability.